Products
PDF Catalog Download
Variable
Differential
Fixed
Tap
Programmable
High-Frequency Probe Unit
Socket
Skew
Differential Signal Balancer/Common-mode Noise Absorber
CDLD
Features
Product Specs
Package Dim. / Pin Config
Suggested Land Pattern
Reflow Soldering Conditions
Typical Applications
Characteristics Examples
Actual Measurement Examples
Technical Note 1:
Example of Eye-Pattern Improvement
Technical Note 2:
Example of Common-Mode Noise Rejection
Technical Note 3:
Example of Differential Signal Balance Improvement
Technical Note 4:
Example of Waveform Improvement Using A Passive Equalizer
Technical Note5:
Frequency Characteristics of Common-Mode Impedance
Technical Note6:
CDLD Transmission Speed
RoHS Compliance Status
Notes
Common Mode Filter
<Common Mode Eliminator>
What's New
Care and Handling
of LTCC Products

Differential Signal Balancer/Common-mode Noise Absorber
CDLD-Type

The CDLD-type is a common-mode filter based on new principles for transmission speeds exceeding 10Gbps. With a common-mode elimination circuit based on ELMEC’s own Delay Line technology, it has the functionality of a Differential Signal Balancer and a Common-mode Noise Absorber. That is, it absorbs and removes the common-mode noise which causes EMI and improves the inter-line imbalance of the differential signal.
Based on a principle of operation different from existing common-mode choke coils, by not utilizing a magnetic core, the influence of magnetic loss is not incurred. The pass-thru characteristics of an excellent differential signal are achieved for the transmission of a high-speed serial differential signal of 4G ~ 16Gbps and 25G ~ 28Gbps. It is suitable for EMI prevention in optical transmission devices, and for improvement of the differential signal eye-pattern in high-speed interfaces.
This product is a 0805 size multi-layered ceramic chip-type LTCC part and is RoHS-compliant.
S-parameter files (Touchstone format) and SPICE models for each component can be provided.

Care and Handling of LTCC Products


Typical Application

(1)The deterioration of the differential signal eye-pattern is improved.
(Please See Technical Note 1)
Eye-pattern before
CDLD connection
Eye-pattern after CDLD
connection

(2) The GHz range common-mode noise is absorbed and removed within the product.
(Please See Technical Note 2)
Common-mode spectrum before
CDLD connection
Common-mode spectrum after
CDLD connection

(3) The differential signal inter-line balance is improved.
(Please See Technical Note 3)
Waveform before CDLD connection
Waveform after CDLD connection

Common Specifications (provisional)

Input/Output Impedance: Differential 100Ω±10%*
Interval Skew Auto-Adjust Time: 1/4Pw (Pw Spec: 1Unit Interval pulse width <200ps)
Waveform Distortion: Overshoot/Preshoot under ±20%
Insulation Resistance: DC50V, over 100MΩ
Durable Voltage: DC50V, 1 minute
Rated Current: 100mA
Rated Voltage: 5V
Operating Temperature Range: -40°C to +85°C
Storage Temperature Range: -40°C to +120°C
* Single-ended operation will not produce usable waveforms.

Part Number Transmission
Speed(1)*
-3dB Passband
(2)*
Output Rise
Time
(20%-80%)
Delay Time DC
Resistance

CDLD07R(3)*

25G~28Gbps DC~20GHz Typ. 25ps Typ. 70ps Typ. 1.0ΩMax.

CDLD10R

8G~16Gbps DC~15GHz Typ. 30ps Typ. 100ps Typ. 1.5ΩMax.
CDLD15R 5G~12.5Gbps DC~12GHz Typ. 35ps Typ. 150ps Typ. 1.5ΩMax.
CDLD30R 4G~8Gbps DC~7.5GHz Typ. 45ps Typ. 300ps Typ. 2.5ΩMax.
(1)* When using the recommended Land Pattern.The case where the passing waveform of 1 unit interval becomes sine wave-like is included. (Please See Technical Note 6)
(2)* Using the recommended Land Pattern, when there is no skew in the differential input signal.

(3)* Design in progress, the specifications other than transmission speed are provisional.
Samples available and production: 1Q-2012


[Jumper Features]
After attaching the pads to the printed circuit board, assuming the possibility that this component might not load properly, we have prepared the CDLD00R jumper between the pads.
The CDLD00R is utilized for a minimal time between the input and output terminals and has no effect on the reduction of common mode noise or differential signal balance.
Part Number -3dB Passband(4)* Output Rise Time
(20%-80%)
Delay Time DC Resistance

CDLD00R

DC~20GHz Min. 25ps Typ. 10ps Typ. 1.0ΩMax.
(4)* Using the recommended Land Pattern, when there is no skew in the differential input signal.


Package Dimensions & Pin Configuration(provisional)

Unit:mm(inch)
Tolerance:±0.2(±0.008)











CDLD00R
・No Direction mark
・No connection between 2pin and 5pin

Suggested Land Pattern

Unit:mm(inch)
Tolerance:±0.1(±0.004)


Suggested Reflow Soldering Conditions

J-STD-020C Pb-Free Standard

Storage conditions are as per MSL1. These component families are not moisture-sensitive. Baking prior to reflow is not required.

Maximum Cycles: 3x



Typical Applications

(1) ECL (-2V termination line used) 




(2) PECL




(3) LVPECL




(4) LVDS


Please be sure to connect the GND Termination. (Please See Notes)



Characteristics Examples

Pulse response waveform (Electro-magnetic simulation)

Interval Skew of Input Pseudo-Random Bit Sequence: 0ps
Rise time(tr)/Fall time(tf): 20%-80%

CDLD07R (25Gbps, tr/tf: 20ps)
CDLD10R (12.5Gbps, tr/tf: 20ps)

CDLD15R (10Gbps, tr/tf: 20ps)
CDLD30R (6Gbps, tr/tf: 40ps)


Frequency Characteristics
(Red: Electro-magnetic simulation, Black: Actual measurement)
CDLD07R(Electro-magnetic simulation)
Sdd21 Differential Transmission
Differential Group Delay
Scc21 Common-mode Transmission
Common-mode power ratio
CDLD10R
Sdd21 Differential Transmission
Differential Group Delay
Scc21 Common-mode Transmission
Common-mode power ratio
(Actual measurement)

CDLD15R
Sdd21 Differential Transmission
Differential Group Delay
Scc21 Common-mode Transmission
Common-mode power ratio
(Actual measurement)

CDLD30R
Sdd21 Differential Transmission
Differential Group Delay
Scc21 Common-mode Transmission
Common-mode power ratio
(Actual measurement)


<Actual Measurement Examples>

The comparative example of a circuit simulation result and an actual measurement result is shown in the following figure.

12.5Gbps Pseudo-Random Bit Sequence, Rise time/Fall time: 25ps/25ps (20%-80%), Skew: 20ps

(1)Common-mode Noise
Prior to CDLD Connection
CDLD10R Connection
Circuit
Simulation
Actual
Measurement
Output waveform[X-axis:500ps/Div,Y-axis:500mV/Div]
Spectrum[X-axis:2GHz/Div,Y-axis:5mV/Div]

(2)Differential Eye-pattern
Prior to CDLD Connection
CDLD10R Connection
Circuit
Simulation
Actual
Measurement
[X-axis:16ps/Div,Y-axis:500mV/Div]


Technical Note 1:
Example of Eye-Pattern Improvement

Utilizing the substrate in Fig. 1, with the I/O SMA connections and the indicated A/B combinations, the simulation-generated differential eye-pattern output is shown in Table 1.
The substrate and the SMA connector use an S-parameter derived from electro-magnetic simulation. The CDLD-type uses an S-parameter measured with a 4-port network analyzer. The convolution method circuit simulation is executed and the response waveform is generated.
Skew 40ps
Table 1 Combination of parts
Substrate thickness: 0.4mm
Substrate εr: 4.1
No.
A
B
1 NA (thru) NA (thru)
2 CDLD10R CDLD10R
3 CDLD15R CDLD15R
4 CDLD30R CDLD30R
Fig.1 Substrate pattern

10Gbps Pseudo-Random Bit Sequence, Rise time/Fall time: 20ps/20ps (20%-80%)
No.1 (thru)
No.2 (CDLD10R)

No.3 (CDLD15R)
No.4 (CDLD30R)


Technical Note 2:
Example of Common-Mode Noise Rejection

Utilizing the substrate indicated in Fig. 1 and the combinations shown of Table 1 of Technical Note 1, the simulation-generated common-mode output waveform and common-mode output Spectrum are shown.
The methods for generating the S-parameter and waveform are the same as indicated in Technical Note 1.

10Gbps Pseudo-Random Bit Sequence, Rise time/Fall time: 20ps/20ps (20%-80%)
Left: Common-mode output waveform, Right: Common-mode output Spectrum
No.1 (thru) Output waveform
No.1 (thru) Spectrum

No.2 (CDLD10R) Output waveform
No.2 (CDLD10R) Spectrum

No.3 (CDLD15R) Output waveform
No.3 (CDLD15R) Spectrum

No.4 (CDLD30R) Output waveform
No.4 (CDLD30R) Spectrum


Technical Note 3:
Example of Differential Signal Balance Improvement

When cables are used to connect the receiver and the transmitter, the waveform shown on the receiver may show deterioration due to innate differences between the cables and the parasitic inductance of the cables. The simulation is run based on the circuit in the figure. The positive and negative differential signal waveforms generated both before and after inserting the CDLD are shown.
The CDLD-type uses an S-parameter measured with a 4-port network analyzer. The convolution method circuit simulation is executed and the response waveform is generated.

(A) 10Gbps Pseudo-Random Bit Sequence, Rise time/Fall time: 20ps/20ps (20%-80%)
Prior to CDLD Connection
CDLD10R Connection
(B) 8Gbps Pseudo-Random Bit Sequence, Rise time/Fall time: 20ps/20ps (20%-80%)
Prior to CDLD Connection
CDLD15R Connection
(C) 5Gbps Pseudo-Random Bit Sequence, Rise time/Fall time: 40ps/40ps (20%-80%)
Prior to CDLD Connection
CDLD30R Connection


Technical Note 4:
Example of Waveform Improvement Using A Passive Equalizer

Utilizing the substrate indicated in the figure below, the output waveforms for the indicated combinations of A, B, and C are shown in the table below. The SMA connector is soldered to the I/O of the substrate, and the S-parameter is measured with a 4-port network analyzer. The convolution method circuit simulation is executed and the response waveform is generated.
Where the skew of the substrate is quite large as in the figure below, there is improvement when utilizing a passive equalizer to correct for the loss on the differential transmission line in combination with the CDLD-type. The combination in the table below is recommended in order to obtain an suitable response waveform when combined with the CDLD.
Substrate thickness: 0.4mm
Substrate εr: 4.1
Combination of parts
No.
A
B
C
1 NA (thru) NA (thru) NA (thru)
2 MAX3787 CDLD30R CDLD30R
MAX3787: Maxim Passive equalizer (Our recommended parts combinations)

10Gbps Pseudo-Random Bit Sequence, Rise time/Fall time: 20ps/20ps (20%-80%)
Top: Differential output eye-pattern,
Middle: Common-mode output waveform,
Bottom: Common-mode output Spectrum
No.1
No.2
Differential
eye-pattern
No.1   No.2
Common-mode output waveform
No.1   No.2
Common-mode spectrum
No.1   No.2



Technical Note 5:
Frequency Characteristics of Common-Mode Impedance

For the CDLD-type and the ideal common-mode choke coil (hereafter, ideal CMC), the frequency characteristics of common-mode impedance are calculated with a circuit simulator and the difference is verified. The equivalent circuit and the main characteristics of the ideal CMC are shown in Fig. 1. As much as possible, the -3dB passband was made wideband.
3dB passband: 16.6GHz
Fig.1 Equivalent circuit and main characteristics o the ideal CMC

The method utilized for calculating common-mode impedance is shown below.In general, common-mode impedance (Zcom)Fig. 2, is generated by a common-mode choke coilfrom common-mode noise. That value can be calculated from this circuit. Conversely, because the structure of the CDLD-type absorbs and removes the common-mode noise within the Signal Line-GND circuit, common-mode impedance (Zcom) can be calculated from the circuit arranged and shown in Fig. 3.

Fig. 4 shows the frequency characteristics of the ideal CMC and CDLD-type Common-mode impedance from the calculation circuits in Figs. 2 and 3. Here, the ideal CMC uses a circuit simulationS-parameter while the CDLD-type uses
an S-parameter measured with a 4-port network analyzer.

Fig.2 

Generation chart and calculation
common-mode choke coil Zcom
Fig.3 

Generation chart and calculation
circuit of CDLD type Zcom

The ideal CMC intercepts the common-mode noise by generating high impedance within the signal line. As shown in Fig. 4, it appears to be effective in the vicinity of 2GHz. However, the inclination of the frequency characteristics is quite steep. Common-mode impedance is reduced as it diverges from 2GHz, and the intercept function decreases.On the other hand, the CDLD-type is set to the value from the signal-GND circuit corresponding to the common-mode impedance which is constant and small and has a fairly smooth frequency response. There appears to be an advantage to being able to lower the dependency on the frequency and to do a wideband absorptive removal of the common-mode noise.
Fig.4 Frequency characteristics of
     Common-mode impedancec












Technical Note 6:
CDLD Transmission Speed

The differential frequency characteristics (Sdd21) of a differential transmission line with a 30ps skew are shown in Fig. 1. In Fig. 1, a differential signal is intercepted to become a complete common mode signal at 16.7GHz because the 30ps skew makes a 180° phase shift at that frequency. Transmission of the differential signal forms an attenuation pole at 16.7GHz and the -3dB passband becomes DC to 8.3GHz.

-3dB Passband: DC~8.3GHz
Fig. 1 Differential frequency characteristics (Sdd21) of differential transmission line with 30ps Skew


0s Skew (-3dB Passband: DC~12.0GHz)
30ps Skew (-3dB Passband: DC~6.8GHz)
Fig.2 Differential frequency characteristics (Sdd21) with CDLD15R connected in the differential transmission line shown in above.

Next, the CDLD15R frequency characteristics of the differential input signal skew of 0s, 30ps are shown in Fig. 2.
In Fig. 2, compared to the -3dB passband of 0s skew, the -3dB passband of 30ps skew is greatly reduced. However, as clearly indicated in Fig. 1, the cause is not due to the effects of the CDLD15R; rather, it is determined by skew generated by the transmission line. That is, the quality of the differential output waveform probably does not depend on the CDLD -3dB passband. Rather, it depends on the value of the skew when the CDLD is connected for skew cancellation. It can be assumed to become like the sine wave to which the high-order harmonic is missed in 1Unit Interval corrugating according to the transmission speed. Especially at speeds of more than 10Gbps, the trend is more noticeable.
Therefore, the corresponding transmission speed of CDLD is not calculated simply from its -3dB passband, when the skew was generated, the maximum value at the correspondence transmission speed to which output waveform fineness was able to be maintained was examined on the assumption that passing waveform at 1Unit Interval became like the sine wave according to the characteristic of Fig. 1.
As a result, we judged that it was possible to correspond enough up to the transmission speed described in the specifications.
In addition, our CSKF-type not only cancels the skew but also restores the differential transmission signal. If the rough skew is canceled by the CSKF-type and the residual skew is canceled by the CDLD, it is possible to balance the differential signal completely.


RoHS Compliance Status

RoHS-compliant

Notes

Always connect the GND terminals. Using this product without connecting the GND could cause common mode noise rejection and delay line functions to deteriorate.
Use of only one line will not yield a normal wave form and cannot be used.




1825 South Grant Street, Suite 310 San Mateo, CA 94402 USA ~ (650) 212-4744 ~ sales@elmectech.com

Copyright © ELMEC Technology of America, Inc. All Rights Reserved.