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CDLF-type
0805 Size Differential Chip Delay Line

・Smaller & lower cost than our existing products
・10ps increments
・15GHz Band width, available for 10Gbps data signals
・Suitable for inter-lane de-skew on multi-lane high speed serial transmission
・Solves the problems of space usage and the characteristic degradation of the substrate trace.(Please See Technical Note)
・Production: Now
・Based on your requirements, 0805 size single-ended Delay Lines are also possible.

Care and Handling of LTCC Products


Specifications

Input/Output Impedance: Differential 100Ω±10% *
Waveform Distortion: Overshoot/Preshoot under ±20%
Insulation Resistance: DC50V, over 100MΩ
Durable Voltage: DC50V, 1 minute
Rated Current: 50mA
Rated Voltage: 5V
Operating Temperature Range: -40°C to +85°C
Storage Temperature Range: -40°C to +120°C
* Single-ended operation will not produce usable waveforms.

Part Number Delay Time Rise/Fall Time(1)* -3 dB Passband DC Resistance
Actual(2)* Guarantee(3)* Actual(2)* Guarantee(3)*
CDLF01C 10ps±5ps 20ps Typ. 40ps Max. DC~20GHz DC~15GHz 0.5Ω Max.
CDLF02C 20ps±5ps 20ps Typ. 40ps Max. DC~20GHz DC~15GHz 0.5Ω Max.
CDLF03C 30ps±5ps 20ps Typ. 40ps Max. DC~20GHz DC~15GHz 1Ω Max.
CDLF04C 40ps±5ps 20ps Typ. 40ps Max. DC~20GHz DC~15GHz 1Ω Max.
CDLF05C 50ps±5ps 20ps Typ. 40ps Max. DC~20GHz DC~15GHz 1Ω Max.
CDLF10C 100ps±10ps 20ps Typ. 40ps Max. DC~20GHz DC~15GHz 1.5Ω Max.
CDLF15C 150ps±10ps 25ps Typ. 50ps Max. DC~18GHz DC~12GHz 1.8Ω Max.
CDLF20C 200ps
+10ps/-20ps
25ps Typ. 50ps Max. DC~15GHz DC~11GHz 2.5Ω Max.
CDLF30C 300ps
+10ps/-20ps
30ps Typ. 60ps Max. DC~10GHz DC~7GHz 3.5Ω Max.

(1)* 20%-80%
(2)*Using the recommended Land Pattern, when there is no skew in the differential input signal.

(3)*Restricted value due to the test fixture.


Recommended combination for 60ps~90ps, 110ps~140ps and 160ps~190ps interpolation
Delay
Time
Combination Delay
Time
Combination Delay
Time
Combination
60ps CDLF03C ×2 110ps CDLF01C+CDLF10C 160ps CDLF01C+CDLF15C
70ps CDLF03C+CDLF04C 120ps CDLF02C+CDLF10C 170ps CDLF02C+CDLF15C
80ps CDLF04C ×2 130ps CDLF03C+CDLF10C 180ps CDLF03C+CDLF15C
90ps CDLF04C+CDLF05C 140ps CDLF04C+CDLF10C 190ps CDLF04C+CDLF15C

We can provide the products for delay times shown in the table above, subject to volume requirements.


Package Dimensions and Pin Configuration

Unit:mm(inch)
Tolerance:±0.1(±0.004)


Direction marking
No.1 pin


CDLF-Type Tape and Reel specifications

Shown below are the packing and product arrangement details for 3000-pc Tape & Reel. Please note, T&R MOQ is 500 pcs with 500-pc increment increases. Packing is embossed carrier tape with attached cover tape. The ELMEC Part Number, Lot Number, Quantity and RoHS-compliance (RoHS=Y) are shown on the reel surface.


Dimensions of Tape
Unit:mm(inch)


Dimensions of Reel
Unit:mm(inch)


Suggested Land Pattern

Unit:mm(inch)
Tolerance:±0.1(±0.004)

Example for Dielectric Layer

Solder Resist
Dielectric Layer (εr)



GND Plane
εr , t and W



Reflow Soldering Conditions

J-STD-020C Pb-Free Standard
Storage conditions are as per MSL1. These component families are not moisture-sensitive. Baking prior to reflow is not required.

Maximum Cycles: 2x





Typical Applications and Termination Methods


(1) PECL




(2) LVPECL




(3) Twisted Pair Termination




(4) LVDS




(5) CML




Output Waveforms

CDLF05C (Actual measurement)

10Gbps PRBS Response Differential Transmission / Reflection
[X-axis: 25ps/Div, Y-axis: 50mV/Div]

16Gbps PRBS Response Differential Group Delay
[X-axis: 15.625ps/Div, Y-axis: 50mV/Div]

CDLF10C (Actual measurement)

10Gbps PRBS Response Differential Transmission / Reflection

[X-axis: 25ps/Div, Y-axis: 50mV/Div]

16Gbps PRBS Response Differential Group Delay
[X-axis: 15.625ps/Div, Y-axis: 50mV/Div]

CDLF20C (Actual measurement)

10Gbps PRBS Response Differential Transmission / Reflection
[X-axis: 25ps/Div, Y-axis: 50mV/Div]

12.5Gbps PRBS Response Differential Group Delay
[X-axis: 20ps/Div, Y-axis: 50mV/Div]

CDLF30C (Actual measurement)

10Gbps PRBS Response Differential Transmission / Reflection
[X-axis: 25ps/Div, Y-axis: 50mV/Div]

12.5Gbps PRBS Response Differential Group Delay
[X-axis: 20ps/Div, Y-axis: 50mV/Div]

Technical Note

Within tens of picoseconds of delay time adjustment, a substrate trace can be used for the return circuit. For a 100ps adjustment, either a substrate trace of a coupled differential pair, as shown in Fig.1, or a substrate trace of an uncoupled differential pair, as shown in Fig.2 can be assumed. However, the trace area in either case will become very large. Moreover, as shown in Fig. 1, a time lag arises between the differential pairs due to the imbalance at the corner. Common mode noise will occur at the mid-point, as will the fear of noise radiation. It is very likely that high-quality 10GHz+ band width characteristics cannot be obtained for the circuit shown in Fig.2.
Fig.1 and Fig.2 are verified with an electromagnetic simulator and the characteristics are compared to the results utilizing the CDLF10C. The published Recommended Land Pattern is assumed for the substrate: W=0.38mm, t=0.3mm, and εr=4.1. The underside of the substrate is GND plane.
Mid-point
Fig.1 Fig.2 Fig.3
Trace example of
a coupled
differential pair
(Trace area: 40mm²)
Trace example of
an uncoupled
differential pair
(Trace area: 30mm²)
CDLF10C
Mounting Image
(Footprint:2.5mm²)

Coupled Trace Comparison (Fig.1) and CDLF10C (Fig.3)
Common-mode Waveform Common-mode Spectrum

Uncoupled Trace Comparison (Fig.2) and CDLF10C (Fig.3)
Differential Transmission Differential Group Delay

Differential Output Eye-pattern(10Gbps PRBS、tr/tf=20ps(20%-80%))



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