PDH 4-bit & 6-bit HS Programmable Delay Lines

The PDH family of high-speed programmable delay lines are available either in 4-bit or 6-bit configurations and come in a dual in-line package in a variety of standard device types or they can be designed to meet your custom specifications.

Features

High-speed 4-bit or 6-bit programmable delay lines that combine ELMEC's own high-speed delay lines and the ECL 10KH series logic elements in a dual in-line package.
In addition to the added speed benefit of ECL 10KH, ELMEC's own high-increment delay lines and even higher density adjusment structures are incorporated, and a high degree of accuracy is obtained at each variable step.
With the inclusion of an effective heat sink, reliability is even further improved.

Common Specifications

Specified Items	4-Bit PDH	6-Bit PDH
Step Accuracy (Guaranteed Frequency)	80 MHz
Number of Steps	16 steps	64 steps
V_EE Voltage	-4.5 to -5.7V (Standard test conditions:-5V)
Inherent Delay	4.5ns MAX.	7.0ns MAX.
Output Rise Time	Compatible with ECL 10KH
Power Consumption -2V -5V	40mA(typ.) 85mA(typ.)	90mA(typ.) 120mA(typ.)
Delay Time Temp. Coefficient	as appropriate for internal ECL 10KH. (Internal delay elements, however, are ±100ppm/°C.)
Operating Temp. Range	-10° C to +60° C
Storage Temp. Range	-40° C to +120° C

PDH 4-bit Product Specifications

Logic 1:ECL (H) Level

Logic 0:ECL (L) Level

Step	Addresses				4-Bit PDH
Step	D₀	D₁	D₂	D₃	PDH4050	PDH4100	PDH4125	PDH4250	PDH4500	PDH4102
0	0	0	0	0	0(ps)	0(ps)	0(ps)	0(ps)	0(ns)	0(ns)
1	1	0	0	0	50	100	125	250	0.5	1
2	0	1	0	0	100	200	250	500	1.0	2
3	1	1	0	0	150	300	375	750	1.5	3
4	0	0	1	0	200	400	500	1000	2.0	4
5	1	0	1	0	250	500	625	1250	2.5	5
:
13	1	0	1	1	650	1300	1625	3250	6.5	13
14	0	1	1	1	700	1400	1750	3500	7.0	14
15	1	1	1	1	750±5%	1500±5%	1875±5%	3750±5%	7.5±5%	15±5%
Step Accuracy±1/2LSB up to 80 MHz					50ps±25ps	100ps±50ps	125ps±62.5ps	250ps±125ps	0.5ns±0.25ns	1ns±0.5ns

Depending upon the desired level of accuracy, these may be used at a much higher frequencies than indicated above. Reference value:±1LSB at 150MHz.

PDH 6-bit Product Specifications

Logic 1:ECL (H) Level

Logic 0:ECL (L) Level

Step	Addresses						6-Bit PDH
Step	D₀	D₁	D₂	D₃	D₄	D₅	PDH6050	PDH6100	PDH6125	PDH6200	PDH6500
0	0	0	0	0	0	0	0(ps)	0(ps)	0(ps)	0(ns)	0(ns)
1	1	0	0	0	0	0	50	100	125	0.2	0.5
2	0	1	0	0	0	0	100	200	250	0.4	1.0
3	1	1	0	0	0	0	150	300	375	0.6	1.5
4	0	0	1	0	0	0	200	400	500	0.8	2.0
5	1	0	1	0	0	0	250	500	625	1.0	2.5
:
13	1	0	1	1	0	0	650	1300	1625	2.6	6.5
14	0	1	1	1	0	0	700	1400	1750	2.8	7.0
15	1	1	1	1	0	0	750	1500	1875	3.0	7.5
:
61	1	0	1	1	1	1	3050	6100	7625	12.2	30.5
62	0	1	1	1	1	1	3100	6200	7750	12.4	31.0
63	1	1	1	1	1	1	3150±5%	6300±5%	7875±5%	12.6±5%	31.5±5%
Step Accuracy±1/2LSB up to 80 MHz							50ps±25ps	100ps±50ps	125ps±62.5ps	0.2ns±0.1ns	0.5ns±0.25ns

Depending upon the desired level of accuracy, these may be used at a much higher frequencies than indicated above. Reference value:±1LSB at 150MHz.

Package Dimensions & Pin Configurations

Unit:mm(inch)

4-Bit PDH

6-Bit PDH

Printable Version - High Resolution PDF

Application Notes:

Make adjustments of delay time at the rising portion of the output waveform.
A heat sink is provided on the top surface of the device.
IN and OUT pins are buffered by ECL gates.
Be sure to match the impedance of external parts when terminating the IN and ADDRESS pins.
Since the internal parts are not hermetically sealed, be sure to exercise due caution in cleaning.
We recommend hand soldering this part following completion of the standard soldering process.