Features
- This high-speed Tapped Delay Line can be used as either a Tapped Output or Tapped Input type Delay Line.
- Because we have developed this component to be used for Tapped In/Output for 70%, 80%, 90% or 100% of the total Delay Time; and, by reversing the In/Output orientation of the In/Out termination, for 10%、20%、30% and 100%, you can select the desired Delay Time in 10% steps.
- When using as a Tapped Output Delay Line, as indicated in Application Example 1, with either Input 50Ω/Output 50Ω, or Input 100Ω/Output 100Ω, you can apply over 5kΩ load connections on any of the 4 outputs.
- When using as a Tapped Input Delay Line, as indicated in Application Example 2, by matching the In/Out terminal impedance to 100Ω, with Input 50Ω/Output 100Ω the device can be used as a Variable Delay Line. Because this Tapped device can use a 100Ω line, high-speed operation is maintained.
- In the future, we are planning the release of 25%, 50%, 75% mid-range Output Tapped Delay Lines.
- Samples will be ready: 2009/4Q
| Impedance: |
Tapped Output, 50Ω±10% and 100Ω±10% In/Output. |
|
Tapped Input, Input 50Ω±10%/Output 100Ω±10%(For 100Ω applications only) |
| Total Delay Time: |
2ns~10ns(Full details available 2009/1Q) |
| Planned Passband: |
800MHz(2ns)~160MHz(10ns)(Total Delay Time indicated in parentheses.) |
| Waveform Distortion: |
Overshoot/preshoot under ±20% |
| Temperature Coefficient: |
-50 to +200ppm/°C |
| Insulation Resistance: |
DC50V, over 100MW |
| Durable Voltage: |
DC50V, 1 minute |
| Operating Temperature Range: |
-40°C to +85°C |
| Storage Temperature Range: |
-40°C to +120°C |
Part Number Example
CDTA○○○□□
○○○ :indicates Total Delay Time, 2- or 3-digit number
ɚ□ :indicates Impedance, 2-digit number
Ex: CDTA5010 :Total Delay Time 5ns, Impedance 100Ω
CDTA10005 :Total Delay Time 10ns, Impedance 50Ω
|
Unit:mm(inch)

|
Soldering Conditions
Reflow Soldering
Maximum Reflow Cycles:2
MSL Levels are not guaranteed. Baking is recommended prior to reflow.
Baking Conditions:120°C, 24 hours; or 80°C, 100 hours
However, as baking of Tape & Reel packaging is not possible, we recommend transferring to trays prior to baking.

|
Soldering Iron:350°C, under 5 seconds
|
Notes
(1)When using as a Tapped Output Delay Line, please apply over 5kΩ load to the Tapped Output connection. When making multiple Tapped connections, please note that the Passband will be approx 40% reduced when compared to a single connection.
(2)When using as a Tapped Input Delay Line, because the Input Impedance will be reduced to approx 1/2 of the Intrinsic Impedance of the Delay Line, Input and Output Impedances cannot both be 50Ω.
(3)For 50Ω In/Output applications, when using a Tapped Input Delay Line, the Input Impedance will become 25Ω requiring an IC to drive the Delay Line. This is not recommended.
|
1. Compliance Status
RoHS-compliant(Pb85%+ High-temperature solder is used internally. RoHS exemption 7a is applied.)
2. Terminal Plating
Sn coating
|
|
|