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VDA High-Speed Buffered Variable Delay Lines
The VDA family of buffered variable delay lines is available in a surface mount package for a variety of types suited to standard devices or can be designed to meet your custom specifications.
Features
- High-speed SMD delay lines offering 31-step delay output that combine buffers and high-increment variable structures with high-density delay elements equivalent to 15-tap devices.
- Buffers for three different logic circuits - TTL, CMOS (FACT, LV CMOS), and ECL - provide for broad usage.
- Products are hermetically sealed, and can be easily washed.
| Variable Steps: |
31 irregular steps (2 step≒time delay variable range/15) |
| Internal Buffer Gates: |
VDA-CS * *: CMOS FACT
VDA-LS * *: LV CMOS
VDA-ES * *: ECL 10KH
VDA-TS * *: TTL FAST
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| Output Rise Time: |
as appropriate for internal buffer gates |
| Power Supply Voltage: |
VDA-CS * *: Vcc 3V to 5V
VDA-LS * *: Vcc 2.7V to 3.6V
VDA-ES * *: Vee -5.2V±0.25V
VDA-TS * *: Vcc 5V±0.25V
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| Inherent Delay: |
VDA-CS * *: 5ns±3ns (Vcc=3.3V)
VDA-LS * *: 4ns±2ns (Vcc=3.3V)
VDA-ES * *: 2ns±1ns
VDA-TS * *: 4ns±2ns
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| Power Consumption: |
VDA-CS * *: 40mA Typ. (Vcc=3.3V)
VDA-LS * *: 40mA Typ. (Vcc=3.3V)
VDA-ES * *: 50mA Typ.
VDA-TS * *: 80mA Typ.
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| Delay Time Temp. Coefficient: |
as appropriate for internal buffer gates. (Internal delay elements, however, are ±100ppm/°C.) |
| Operating Temperature Range: |
0°C to +70°C |
| Storage Temperature Range: |
-40°C to +120°C |
| Switching Life Expectancy: |
Guaranteed within 100 cycles.
(One cycle is defined as the movement of the knob from one end to the other.) |
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| Part Number |
Delay Time Range ± 5% |
Delay Time Increments |
Accuracy of Increments (1)* |
Max. Freq. for Guaranteed Accuracy |
Signal Passthrough Frequency |
| VDA-ES7R5 |
0-7.5ns
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0.5ns steps |
±0.25ns or ±5% |
133MHz |
150MHz |
| VDA-ES15 |
0-15ns |
1ns steps |
±0.5ns or ±5% |
66MHz |
150MHz |
VDA-CS15
VDA-LS15
VDA-TS15 |
0-15ns |
1ns steps |
±0.5ns or ±5% |
66MHz |
100Mhz |
| VDA-ES30 |
0-30ns |
2ns steps |
±1ns or ±5% |
33MHz |
75Mhz |
VDA-CS30
VDA-LS30
VDA-TS30 |
0-30ns |
2ns steps |
±1ns or ±5% |
33MHz |
60MHz |
(1)* See following page (Delay Time Characteristics) for description of basic incremental capacity and accuracy |
Unit:mm(inch)
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For VDA-xx15 devices, the accuracy of delay time increments is specified as either ±0.5ns or ±5%, whichever is greater. An illustrative sequence of values would be as follows: 1.0ns±0.5ns, 2.0ns±0.5ns... 10.0ns±0.5ns (=±5%), 11.0ns±5%... 15.0ns±5%.
There are a total of 31 incremental steps, but the guaranteed delay times are derived from 15 output values comprising two incremental steps each. Typically, the specified delay outputs are derived from even-numbered steps (step 0, 2, 4, etc). However, delay time accuracy is guaranteed on the basis of pairs of odd-numbered steps in combination.
The variation in delay time corresponding to each step is illustrated in the diagram to the right. The black dots in the diagram represent the stable contact points for the selector mechanism, and define each respective step. The dotted lines indicate the delay time selected when moving between steps. The delay time of the even-numbered steps is selected when the selector knob is moved.
Even-numbered steps correspond to the tap outputs of earlier tapped-style delay lines, and the odd-numbered steps are supplementary steps achieved through ELMEC's proprietary variability mechanism. Odd numbered steps are interspersed between even-numbered steps at a ratio of approximately 2:8.
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ECL Buffer gates
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TTL, CMOS Buffer gates
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(1) ECL Buffers (PECL)
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(2) ECL
(When -2V termination is available)
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(3) TTL, CMOS
(standard connection scheme)
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(4) Series termination
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(5) TTL
(When line impedance is over 100W)
If the drive capability of the preceding IC is adequate, it is feasible to change one Zo termination resistor to the input side also. |
(6) CMOS
(When drive capacity of preceding IC is adequate)
If the drive capability of the preceding IC is inadequate, use method (5). However, the output side has a drive capability for the 50W line. |
Application Notes
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When using the VDA-CS series for applications of Vcc>3.6V, we recommend that the input at pin No. 1 should be fixed high when there is no signal input (= active low input). If pin No. 1 is fixed low for long periods, the rated power of R1 may sometimes be exceeded. |
Output Waveforms
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VDA-CS15
100MHz Duty 50
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VDA-CS30
60MHz Duty 50
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VDA-TS15
100MHz Duty 50
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VDA-TS30
60MHz Duty 50
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VDA-ES15
150MHz Duty 50
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VDA-ES30
75MHz Duty 50
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RoHS Compliance Status
Compliance Status
RoHS-compliant components are available.(However, Reflow Soldering is not permitted.)
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