VDK Ultra High-Speed Variable Delay Lines
The VDK family of ultra high-speed variable delay lines is available in a variety of devices in either standard or custom specifications.
Features
- Ultra high-speed variable delay lines that allow broad usage with such ultra high-speed logic elements as the ECLinPS or CML, or even higher speed switching mechanisms.
- Also suitable for use in a wide range of applications in analog circuits.
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Common Specifications
| DC Max Voltage |
DC 3V max. constantly |
| -3dB Passband: |
800MHz or more |
| Inherent Delay: |
220 ps max. at the minimum point within the variable range |
| Waveform Distortion: |
Overshoot/Preshoot under ± 20% |
| Delay Time Temp. Coefficient |
± 100ppm/°C |
| Operating Temperature Range: |
-10°C to +80°C |
| Storage Temperature Range: |
-40°C to +120°C |
| Switching Life Expectancy: |
Guaranteed within 100 cycles.
(One cycle is defined as the movement of the knob from one end to the other.) |
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Product Specifications
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Part Number
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Delay Time Range
-0% to +20%
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Increment Resolution
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Rise Time (20% - 80%)
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Input Impedance
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Output Impedance
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Logic Family Preferred
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| VDK0510 |
0-0.5ns |
12.5ps 40 Steps |
300ps Max. |
50W ± 10% |
100W ± 10% |
Any ECL |
| VDK2010 |
0-2ns |
50ps 40 Steps |
| VDK0515 |
0-0.5ns |
12.5ps 40 Steps |
75W ± 10% |
15W ± 10% |
| VDK2015 |
0-2ns |
50ps 40 Steps |
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Package Dimensions & Pin Configurations
Unit:mm(inch)
Application Notes:
Care is to be exercised in aqueous cleaning since the VDK Type is not hermetically sealed. We recommend hand soldering this part. A dust cover cap is provided on the top of each part. |
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VDK2010
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Typical Applications and Temination Methods
(1) Analog circuit
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Rin: Input adjustment resistance
Zo: Characteristics impedance of internal
Elements (=Output impedance)
Ro: Internal adjustment resistance (=Zo)
2(r+Rin)=Zo=R
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(2) ECL (-2V Termination Line Used)
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(3) PECL
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(4) LVPECL
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RoHS Compliance Status
Compliance Status
There are no plans to produce an RoHS-compliant replacement for this component.
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